El objeto de esta tesis es el desarrollo de nuevas técnicas heurísticas que permitan obtener soluciones óptimas en aquellos problemas de gran complejidad que aparecen en el diseño automático de circuitos integrados. Las técnicas propuestas se aplican al problema de la colocación (placement) de celdas estándar en circuitos de muy alta escala de...
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March 1, 2018 (v1)PublicationUploaded on: March 27, 2023
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March 8, 2021 (v1)Publication
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Uploaded on: March 25, 2023 -
March 8, 2021 (v1)Publication
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Uploaded on: March 26, 2023 -
March 13, 2015 (v1)Publication
Se propone un nuevo método de mejora de los resultados del "placement" de un circuito VLSI. El método propuesto utiliza un particionamiento recursivo para obtener una solución de partida para el posterior proceso de enfriamiento simulado. Para preservar los beneficios de esta solución de partida, la temperatura inicial del algoritmo de...
Uploaded on: March 27, 2023 -
March 8, 2021 (v1)Publication
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Uploaded on: December 4, 2022 -
November 4, 2022 (v1)Publication
Método para análisis y test funcional de circuito digitales de gran dimensión mediante emuladores HARDWARE.Parte de un número indefinido de eventos o condiciones (1), (1')... (1n ), respectivos circuitos detectores (2), (2')... (2n), actuantes en combinac
Uploaded on: March 24, 2023 -
March 26, 2015 (v1)Publication
The aim of this work is to explore some solutions for artificial vision systems applied to welding autonomous robots. We take advantage from the UNSHADES-1 system, developed in Filiation (blind for evaluation). This system can be used for building a powerful 3D vision system. The system concentrates and process the three images in parallel,...
Uploaded on: March 27, 2023 -
March 13, 2015 (v1)Publication
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Uploaded on: March 27, 2023 -
October 26, 2022 (v1)Publication
Método para análisis y test funcional de circuito digitales de gran dimensión mediante emuladores HARDWARE.Parte de un número indefinido de eventos o condiciones (1), (1')... (1n ), respectivos circuitos detectores (2), (2')... (2n), actuantes en combinac
Uploaded on: March 24, 2023 -
March 26, 2015 (v1)Publication
The development of digital ASIC's with a large area states a lot of doubts when the ingenieer must design a test strategy. The design of an industrial circuit advises a test to be made quite similar to the normal field functioning. If the size of the die is large or quite complex this idea can be unreachable. The techniques of automatic test...
Uploaded on: March 27, 2023 -
May 29, 2015 (v1)Publication
Due to the increase in size and complexity of VLSI integrated circuits, new design tools are becoming needed. Telecommunications and Electronic Industry demand designs that integrate intensive digital signal processing blocks and complex control tasks. Rapid Prototyping techniques introduce a new stage into the design flow that overcome the...
Uploaded on: March 27, 2023 -
September 14, 2018 (v1)Publication
El objeto del presente proyecto es el desarrollo de un circuito integrado de aplicación específica (ASIC) para su incorporación en el proyecto ERINl, destinado a la adquisición de datos control remoto de procesos . El sistema se basa en un conjunto de estaciones remotas de bajo coste y baja capacidad, que forman parte de un sistema de...
Uploaded on: December 4, 2022 -
March 26, 2015 (v1)Publication
Rapid prototyping of large digital systems is becoming supported with the use of new advanced FPGA's. These FPGA's can give more Information than functional simulation and emulation tasks, due to their inner inspection features. This paper presents HADES-l, a new environment for rapid prototyping and hardware debugging. HADES-l is based on one...
Uploaded on: March 27, 2023 -
March 13, 2015 (v1)Publication
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Uploaded on: March 27, 2023 -
February 17, 2016 (v1)Publication
Preprint del Congreso IFCA´93, celebrado los días 21-23 Abril,1993. Patrocinado entre otros por la UPC. Ponencia digitalizada por el autor.
Uploaded on: December 2, 2022 -
March 26, 2015 (v1)Publication
This paper describes a new detailed routing algorithm, speciffically designed for those types of architecturesthat are found on the most recent generations of Field-Programmable Gate Arrays (FP-GAs). The algorithm, called RAISE, can be applied to a broad range of optimizations problems and has been used for detailed routing of symmetrical...
Uploaded on: March 27, 2023 -
March 26, 2015 (v1)Publication
This paper presents a new scheme for OFDM time and frequency synchronization with application in Power Line Telecommunications (PLT). Simulation results show an excellent behavior, even for the low values of SNR in the synchronizer input inherent to PLT. The synchronizer has been prototyped on an FPGA prior to be integrated in the single-chip...
Uploaded on: March 27, 2023 -
January 24, 2020 (v1)Publication
In high-power applications, the maximum switching frequency is limited due to thermal losses. This leads to highly distorted output waveforms. In such applications, it is necessary to filter the output waveforms using bulky passive filtering systems. The recently presented selective harmonic mitigation pulsewidth modulation (SHMPWM) technique...
Uploaded on: March 25, 2023 -
March 26, 2015 (v1)Publication
High power converters are built using high-voltage and high-current rated semiconductors. The commutation of these devices imply large amounts of energy per cycle leading to very low switching frequency in order to avoid a high rise on the semiconductors temperature. The consequence is high harmonic distortion generated by the converter. Grid...
Uploaded on: March 25, 2023 -
March 13, 2015 (v1)Publication
El circuito ASIC descrlto es una unidad de comunicaciones destinada a sistemas de ascensores. Este diseño reduce en gran medida de las necesidades de cableado que encarece la instalación de los sistemas de ascensores. Por un único canal de fibra óptica pueden comunicarse hasta un máximo de 31 chips, cada uno de los cuales controla los distintos...
Uploaded on: March 27, 2023