2002 (v1)
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1991 (v1)Publication
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2001 (v1)Publication
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2001 (v1)Publication
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1999 (v1)Publication
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2000 (v1)Publication
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2003 (v1)Publication
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2003 (v1)Publication
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1993 (v1)Publication
The efficiency of a symbolic compactor is closely related to the quality of the physical layout produced. In particular, a reduction of the dimensions of the chip can be achieved by eliminating useless components, optimizing wires, and performing a proper rearrangement of the components positions. In this paper, some optimization strategies are...
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1991 (v1)Publication
A design rule checking program for VLSI circuit layouts with Manhattan geometries is presented. The layout model is described along with the way the authors implemented the check through few and simple primitives for describing parameteric rules. A single main function for the geometrical test is outlined and how the authors succeeded in...
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1995 (v1)Publication
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1999 (v1)Publication
In this paper, a powerful communication scheme is introduced to efficiently meet different communication requirements for behavioural synthesis from VHDL. The algorithmic description of the system behaviour is specified through a set of cooperating VHDL processes. Communication between processes is provided by the definition of a...
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1999 (v1)Publication
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1996 (v1)Publication
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1998 (v1)Publication
A new data-flow graph representation is presented, which can be used in system level synthesis for the specification and management of a generic basic block node behavior. It is possible to flexibly specify and manage any composite data structure through the definition of a powerful representation scheme for arrays and records.
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1998 (v1)Publication
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1998 (v1)Publication
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