DIOTALEVI , Francesco

The CMOS circuit implementation of the feed forward neural primitives of a generic Multi Layer Perceptron network is presented. Basically our approach is based on current mode computation and is aimed at a low power/low voltage circuit implementation; moreover, it is easily scalable to implement network of any size. Experimental results are reported.

This paper deals with analog VLSI architectures addressed to the implementation of smart adaptive systems on silicon. In particular, we addressed the implementation of artificial neural networks with on-chip learning algorithms with the goal of efficiency in terms of scalability, modularity, computational density, real time operation and power...

The weight perturbation learning algorithm was formerly developed by hardware designers for its friendly features in the perspective of the analog on-chip implementation. Therefore it has not been validated in real-world applications but only on test problems. To significantly increase its attitude for the on-chip implementation, we proposed a...

This paper deals with analog VLSI architectures addressed to the implementation of smart adaptive systems on silicon. In particular, we addressed the implementation of artificial neural networks with on-chip learning algorithms with the goal of efficiency in terms of scalability, modularity, computational density, real time operation and power...

Gradient descent learning algorithms (namely Back Propagation and Weight Perturbation) can significantly increase their classification performances adopting a local and adaptive learning rate management approach. In this paper, we present the results of the comparison of the classification performance of the two algorithms in a tough...