Architecture analysis & design language (AADL) has been increasingly adopted in the design of embedded systems, and corresponding scheduling and formal verification have been well studied. However, little work takes code distribution and architecture exploration into account, particularly considering clock constraints, for distributed...
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October 2013 (v1)Journal articleUploaded on: December 3, 2022
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October 2013 (v1)Journal article
Architecture analysis & design language (AADL) has been increasingly adopted in the design of embedded systems, and corresponding scheduling and formal verification have been well studied. However, little work takes code distribution and architecture exploration into account, particularly considering clock constraints, for distributed...
Uploaded on: October 11, 2023 -
1993 (v1)Report
Ce document définit la syntaxe et la sémantique des formats communs des langages synchrones. Ces formats constituent un socle commun à la programmation synchrone, sur lequel de nombreux outils seront applicables. Le socle est constitué de trois formats entre lesquels existeront des passerelles de traduction : IC est un format parallèle de type...
Uploaded on: December 3, 2022