In the last years, there has been a growing interest in the design of multichannel neurocortical recording interfaces with wireless transmission capabilities for the untethered measurements of brain activity. These interfaces are expected to play a signif
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April 13, 2018 (v1)PublicationUploaded on: December 4, 2022
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October 7, 2019 (v1)Publication
This paper reports a calibration system for automatically adjusting the bandpass and gain characteristics of programmable E×G sensors. The calibration mechanism of the bandpass characteristic is based on a mixed-signal tuning loop which uses as feedback signal the output of the data converter following the signal conditioning of the E×G sensor....
Uploaded on: December 4, 2022 -
November 4, 2022 (v1)Publication
Sistema (1) de adquisición y transferencia de actividad neuronal que comprende al menos una pluralidad de sensores bioeléctricos (20000), un transceptor inalámbrico (30000), un nudo de comunicaciones (10000) conectado entre la pluralidad de sensores bioel
Uploaded on: December 5, 2022 -
November 13, 2019 (v1)Publication
This paper reports a 64-channel inductively powered neural recording sensor array. Neural signals are acquired, filtered, digitized and compressed in the channels. Additionally, each channel implements a local auto-calibration mechanism which configures the transfer characteristics of the recording site. The system has two operation modes; in...
Uploaded on: March 27, 2023 -
November 6, 2019 (v1)Publication
This paper presents a mixed-signal neural spike recording channel which features, as an added value, a simple and low-power data compression mechanism. The channel uses a band-limited differential low noise amplifier and a binary search data converter, together with other digital and analog blocks for control, programming and spike...
Uploaded on: December 5, 2022 -
September 20, 2019 (v1)Publication
This paper presents a power efficient architecture for a neural spike recording channel. The channel offers a selfcalibration operation mode and can be used both for signal tracking (to raw digitize the acquired neural waveform) and feature extraction (to build a PWL approximation of the spikes in order to reduce data bandwidth on the RF-link)....
Uploaded on: December 5, 2022 -
November 11, 2019 (v1)Publication
This paper presents a 12-bit low-voltage low-power reconfigurable Analog-to-Digital Converter (ADC). The design employs Switched Capacitor (SC) techniques and implements a Successive Approximation (SA) algorithm. The ADC can be tuned to handle a large variety of biopotential signals, with digitally selectable resolution and input signal...
Uploaded on: March 27, 2023 -
December 4, 2019 (v1)Publication
This paper reports a programmable 400 μm pitch neural spike recording channel, fabricated in a 130 nm standard CMOS technology, which implements amplification, filtering, digitization, analog spike detection plus feature extraction, and self-calibration functionalities. It can operate in two different output modes: 1) signal tracking, in which...
Uploaded on: March 27, 2023 -
May 8, 2018 (v1)Publication
This paper presents a Low Noise Amplifier (LNA) for neural spike recording applications. The proposed topology, based on a capacitive feedback network using a two-stage OTA, efficiently solves the triple trade-off between power, area and noise. Additionally, this work introduces a novel transistor-level synthesis methodology for LNAs tailored...
Uploaded on: March 27, 2023 -
May 21, 2018 (v1)Publication
This paper presents a low-area low-power Switched-Capacitor (SC)-based Programmable-Gain Analog-to-Digital Converter (PG-ADC) suitable for in-channel neural recording applications. The PG-ADC uses a novel implementation of the binary search algorithm that is complemented with adaptive biasing techniques for power saving. It has been fabricated...
Uploaded on: December 4, 2022 -
April 13, 2020 (v1)Publication
This paper describes the design of mixed-signal back end for an ultrahigh-frequency sensor-enabled radio-frequency identification transponder in full compliance with the Electronic Product Code Class-1 Generation-2 protocol, defined in the standard ISO 18000-6C. The chip, implemented in a low-cost 0.35-μm CMOS technology process, includes a...
Uploaded on: March 27, 2023 -
November 6, 2019 (v1)Publication
This paper presents a self-calibration circuit for a neural spike recording channel. The proposed design tunes the bandwidth of the signal acquisition Band-Pass Filter (BPF), which suffers from process variations corners. It also performs the adjustment of the Programmable Gain Amplifier (PGA) gain to maximize the input voltage range of the...
Uploaded on: December 4, 2022