Published November 15, 2024 | Version v1
Journal article

Hybrid package integration strategy for silicon ICs operating beyond 200 GHz

Others:
STMicroelectronics [Crolles] (ST-CROLLES)
Laboratoire de Polytech Nice-Sophia (Polytech'Lab) ; Université Nice Sophia Antipolis (1965 - 2019) (UNS)-Université Côte d'Azur (UniCA)
Institut d'Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN) ; Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA) ; Université catholique de Lille (UCL)-Université catholique de Lille (UCL)
Photonique THz - IEMN (PHOTONIQUE THZ - IEMN) ; Institut d'Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN) ; Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA) ; Université catholique de Lille (UCL)-Université catholique de Lille (UCL)-Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA) ; Université catholique de Lille (UCL)-Université catholique de Lille (UCL)
Electronique pour Objets Connectés (EpOC) ; Université Nice Sophia Antipolis (1965 - 2019) (UNS)-Polytech Nice-Sophia-Université Côte d'Azur (UniCA)
The authors acknowledge the host institutions thatsupported the work during the PhD of Dr Ovalle-Taylor: STMicroelectronics,Université Cote d'Azur (UCA), and the Centre National de la RechercheScientifique (CNRS).Funding statement. This work was carried out in the framework ofCIFRE contract (Convention number: 2020/1364), signed under three partners:STMicroelectronics Crolles, UCA, and CNRS.
Laboratoire commun STMicroelectronics-IEMN T1

Description

This paper proposes an innovative hybrid package integration strategy compatible with siliconbased technologies. It is evaluated beyond 200 GHz by the integration of a WR3 back-to-back waveguide-to-suspended stripline transition designed in BiCMOS technology, relying on metallic split-block package and organic laminate substrate. Simulated insertion loss below 3 dB is observed in the 220-320 GHz frequency band, competing with reported traditional solutions using III-V substrates. The achieved performances lead to promising perspectives for low-cost silicon packaging solutions beyond 200 GHz.

Abstract

International audience

Additional details

Created:
January 13, 2025
Modified:
January 13, 2025