UML/MARTE CCSL, Signal and Petri nets

Description

UML goal of being a general-purpose modeling language discards the possibility to adopt too precise and strict a semantics. Users are to refine or define the semantics in their domain specific profiles. In the UML Profile for Modeling and Analysis of Real-Time and Embedded systems, we have defined a broadly expressive Time Model to provide a generic timed interpretation for UML models. Our clock constraint specification language supports the specification of systems with multiple clock domains. Starting with a priori independent clocks, we progressively compose them to get a family of possible executions. Our language supports both synchronous and asynchronous compositions, just like the synchronous language Signal, but also allows explicit non determinism. In this paper, we give a formal semantics to a core subset of MARTE clock constraint languages and we give an equivalent interpretation of this kernel in two other very different formal languages, Signal and Time Petri Nets.

Abstract

Published in the proceedings of ISORC'09 http://dx.doi.org/10.1109/ISORC.2009.27

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