Published May 12, 2017
| Version v1
Publication
Design methodology for FPGA implementation of lattice piecewise-affine functions
Description
This paper describes a design methodology to implement on FPGAs piecewise-affine (PWA) functions based on representation methods from the lattice theory. An off-line automatic processing starts at the algorithmic formulation of the problem, obtains the parameters required by a parameterized digital architecture, and ends with the bitstream to program an FPGA. The methodology has been proven to implement PWA functions on Xilinx FPGAs. The results are compared with other approaches for FPGA implementations of PWA functions
Additional details
Identifiers
- URL
- https://idus.us.es/handle/11441/59725
- URN
- urn:oai:idus.us.es:11441/59725
Origin repository
- Origin repository
- USE