A 0.5 /spl mu/m CMOS CNN analog random access memory chip for massive image processing

Description

An analog RAM has been designed to act as a cache memory for a CNN Universal Machine. Hence, all the non-standard chips are available for the CNN Chipset architecture. Time-multiplexed analog routines in the CNN processor require fast and efficient short-time signal storage in an analog buffer. This can be achieved by an extended sample and hold scheme able to address every sample to specific memory locations. Several arrays of capacitors are multiplexed sharing controlling circuitry and I/O buses. The design has the following key parameters: 637 analog memory cells/mm/sup 2/ with 0.4% accuracy, 100 ns access time and 170 ms storage time (within 1% error).

Abstract

JSEP FDF49620-97-1-0220-03/98

Abstract

Office of Naval Research (USA) N00014-98-1- 0052

Additional details