Published 2013
| Version v1
Publication
Designing high-value resistive network using weak inversion region of a PMOS device at the floating gate of a sensor
- Creators
- SINHA, ARUN KUMAR
- CAVIGLIA, DANIELE
- Others:
- Sinha, ARUN KUMAR
- Caviglia, Daniele
Description
In this paper, we propose a design solution for implementing high-value resistance circuit, intended to bias the floating gate of PolyVinyliDene Fluorine (PVDF) based tactile sensors. The solution was proposed to design circuits based on Twin-tub and N-well processes. The formulations of mathematical equations were derived from EKV model. Our simulation results are in terms of frequency and transient responses, and they show that both the circuits were able to realize very high value of resistance suited for this sensor application in typical cases. However, in terms of process, voltage, and temperature variations, the results shown by the N-well process were better than those of the Twin-tub process at corner cases.
Additional details
- URL
- http://hdl.handle.net/11567/698016
- URN
- urn:oai:iris.unige.it:11567/698016
- Origin repository
- UNIGE