Published March 17, 2020
| Version v1
Publication
VLSI implementation of a transconductance mode continuous BAM with on chip learning and dynamic analog memory
Description
In this paper we present a complete
VLSI Continuous-Time Bidirectional Associative
Memory (BAM). The short term memory (STM)
section is implemented using small transconductance
four quadrant multipliers, and capacitors
for the integrators. The long term memory (LTM)
is built using an additional multiplier that uses
locally available signals to perform Hebbian learning.
The value of the learned weight is present
at a capacitor for each synapse. After learning
has been accomplished the value of the stored
weight voltage can be refreshed using a simple
AID-D/A conversion, which if done fast enough,
will maintain the weight value within a discrete
interval of the complete weight range. Such a
discretization still allows good performance of
the STM section after learning is finished.
Additional details
Identifiers
- URL
- https://idus.us.es/handle//11441/94214
- URN
- urn:oai:idus.us.es:11441/94214
Origin repository
- Origin repository
- USE