Published December 19, 2016
| Version v1
Publication
Building a basic membrane computer
Description
In this work, we present the building of two well-known membrane com- puters (squares generator and divisor test). Although they are very basic machines they present problems common to every P system (competition, parallel execution of rules, membrane dissolution, etc.) that have to be solved in order to get real emulations for them. The presented designs mimic the systems operation in a realistic way, by achieving both maximum parallelism and non-determinism, and demonstrating for the rst time that a membrane computer can actually be built in silico. Our architectures fully emu- late the membranes behaviour yielding to a performance of one transition per clock cycle, supposing a real physical realization of the mentioned machines.
Additional details
- URL
- https://idus.us.es/handle/11441/50686
- URN
- urn:oai:idus.us.es:11441/50686
- Origin repository
- USE