A charge correction cell for FGMOS-based circuits

Description

This paper describes a novel cell used in circuits with Floating Gate MOS transistors (FGMOS) to compensate variations in the device effective threshold voltages caused by the trapped charge at the floating gate. The performance of the circuit is illustrated with experimental results showing a residual error below 1%. This coarse compensation makes possible to reduce charge effects to the same order of magnitude than the conventional mismatching in normal MOS transistors.

Additional details