Auto-tuning system for maximum operating frequency in FPGA by dynamic reconfiguration

This paper proposes the use of a dynamic clock reconfiguration technique to optimise the performance of a circuit by changing its clock frequency to achieve the maximum operating frequency. The proposed technique uses an FPGA (Field Programmable Gate Array) reconfigurable clock generator circuit that changes the generated clock frequency for a circuit in real time. By systematically increasing the clock frequency and monitoring the response of the circuit, the operating frequency can be determined. The effectiveness of the proposed technique has been tested by simulation and experimental results have been obtained with the development of a real system. The results obtained show that the maximum operating frequency of a circuit can be accurately determined while maintaining its reliability and integrity.