1 V CMOS subthreshold log domain PDM

Description

A new CMOS circuit strategy for very low-voltage Pulse-Duration Modulators (PDM) is proposed. Optimization of voltage supply scaling below the sum of threshold voltages is based on Instantaneous Log Companding processing through the MOSFET operating in weak inversion. A 1 V VLSI PDM circuit for very low-voltage audio applications such as Hearing Aids is presented, showing good agreement between simulated and experimental data.

Abstract

Comisión Interministerial de Ciencia y Tecnología TIC97-1159, TIC99-1084

Abstract

European Union 23068

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