Towards analog and digital hardware for support vector machines

Description

Support Vector Machines are gaining more and more acceptance thanks to their success in many real-world problems. We propose in this work a solution for implementing SVM in hardware. The main idea is to use a recurrent network for SVM learning that guarantees the globally convergence to the optimal solution without the use of penalty terms. This network improves our and other authors' previous solutions. The recurrent network is suitable for a straightforward analog VLSI realization; the digital solution can be derived through a discretization (in time) of the circuit.

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