New high performance second generation CMOS current conveyor

A new high performance second-generation CMOS current conveyor architecture is presented. It is built using a differential flipped voltage follower as its input buffer stage and a cascode current mirror as output stage. It is characterized by very low output impedance. It provides gain independent high bandwidth when used to implement a programmable gain voltage amplifier. Simulation and experimental results in AMI 0.5µm CMOS technology are provided to validate the characteristics of the design.