Published September 19, 2018 | Version v1
Publication

A new reconfigurable cascade ΣΔ modulator architecture with inter-stage resonation and no digital cancellation logic

Description

This paper presents a new two-stage cascade ΣΔ modula- tor architecture that uses inter-stage resonation to increase its effec- tive resolution as compared to conventional cascades and avoids the need for digital filtering in the error cancellation logic. The combi- nation of these two strategies, together with the use of unity signal transfer function in all stages, make the presented modulator highly tolerant to noise leakages, very robust to non-linearities and mis- matches of the loop-filter circuitry, and especially suited for low-voltage implementations at low oversampling ratios. In addi- tion, the use of loop filters based on Forward-Euler integrators, instead of Backward-Euler integrators, simplifies the switched-capacitor implementation of the resonation and makes the presented architecture very suited for reconfigurable multi-stand- ard applications. Besides, several practical details about the imple- mentation of the modulator are given throughout the paper. As an illustration, a Beyond-3G case study is shown to demonstrate the benefits of the presented approach.

Abstract

Organizado por la Universidad de Zaragoza (Unizar) del 18 al 20 de Noviembre del 2009

Additional details

Identifiers

URL
https://idus.us.es/handle//11441/78640
URN
urn:oai:idus.us.es:11441/78640

Origin repository

Origin repository
USE