Published January 8, 2024 | Version v1
Publication

Hardware Implementation of a Biometric Recognition Algorithm based on In-Air Signature

Description

This paper presents the design of a prototype for a wearable device that implements a recognition system based on in-air signature into a FPGA that receives data from a 3-axis accelerometer. The Dynamic Time Warping (DTW) algorithm has been analyzed and simplified to reduce the complexity of the hardware architecture that implements the matching in the FPGA. Despite simplification, accuracy of the recognition is maintained and the Equal Error Rate, EER, is 4.21% considering a public database with 120 in-air signatures. A prototype based on a Spartan 6 LX9 microboard connected to an ultralow power ADXL345 accelerometer has been developed. Performance of the prototype working with in-air signatures has been verified with a script developed in Matlab-Simulink. The execution time for matching is 22 ms and the estimated average power consumption of the matching in the FPGA is 26 mW.

Abstract

Ministerio de Economía y Competitividad del Gobierno español y PO FEDER-FSE - TEC2011-24319 e IPT2012-0695-390000

Additional details

Identifiers

URL
https://idus.us.es/handle//11441/153025
URN
urn:oai:idus.us.es:11441/153025

Origin repository

Origin repository
USE