FPGA implementation of an embedded face detection system based on LEON3

Description

This paper presents an FPGA face detection embedded system. In order achieve acceleration in the face detection process a hardware-software codesign technique is proposed. The paper describes the face detection acceleration mechanism. It also describes the implementation of an IP module that allows hardware acceleration.

Abstract

Comisión Europea MOBY-DIC FP7-IST-248858

Abstract

Ministerio de Ciencia y Tecnología TEC2011-24319

Abstract

Junta de Andalucía P08-TIC-03674

Additional details