Spiking Neural P system without delay simulator implementation using GPGPUs
Description
This paper presents a parallel simulator for a type of P sys- tem known as spiking neural P system (SNP system) us- ing general purpose graphics processing units (GPGPUs). GPGPUs, unlike the more conventional and general pur- pose, multi-core CPUs, are used for parallelizable problems due to their architectural optimization for parallel compu- tations. Membrane computing or P systems on the other hand, are cell-inspired computational models which compute in a max- imally parallel and non-deterministic manner. SNP systems, w/c compute via time separated spikes and whose inspira- tion was taken from the way neurons operate in living or- ganisms, have been represented as matrices. The matrix representation of SNP systems provides a crucial step into their simulation on parallel devices such as GPG- PUs. Simulating the highly parallel nature of SNP systems necessitates the use of hardware intended for parallel com- putations. The simulator algorithms, design considerations, and implementation are presented. Finally, simulation re- sults, observations, and analyses using an SNP system that generates all numbers in N - f1g are discussed.
Additional details
- URL
- https://idus.us.es/handle//11441/106480
- URN
- urn:oai:idus.us.es:11441/106480
- Origin repository
- USE