Time-interleaving design of error-feedback sigma-delta modulators with infinite impulse response noise transfer function

Description

Transceivers built to modern communication standards tend to be as digital as possible, including the radio-frequency stages. This forces the digital-to-analogue converters (DACs) in the transmitter section to have a large bandwidth. DACs based on sigma-delta (SD) modulation represent a good choice in modern digital technologies as they have a simple analogue circuitry with limited accuracy requirements. Error-feedback (EF) architectures are widely used in the realisation of SD modulators. In many applications, DAC output has a small number of bits. In that case, the noise transfer function (NTF) must be of high order (to achieve a high dynamic range) and of the infinite impulse response (IIR) type (for the sake of stability). Concerning its implementation, one of the main challenges comes from the speed limitation of the technology. In this sense, time-interleaving (TI) allows the designer a trade-off between complexity and speed. Transforming the EF architecture into its TI counterpart is not straightforward for IIR NTFs. A procedure for this transformation is proposed, and a case study is described for a third-order modulator. A method of coefficient rounding is also proposed to simplify the digital implementation of the modulator while avoiding mismatches between the parallel paths of the TI modulator.

Abstract

Ministerio de Ciencia, Innovación y Universidades (España) RTI2018‐099189‐B‐C21

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