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Brevet STMicroelectronics - Université de Provence, n° d'application 11/155306, US 7242621
International audience
International audience
Nowadays, the study of physical mechanisms that occur during Flash memory cell life is mandatory when reaching the 40nm and beyond nodes in terms of reliability. In this paper we carry out a complete experimental method to extract the floating gate potential evolution during the cell aging. The dynamic current consumption during a Channel Hot...
International audience
International audience
A new transistor architecture is developed by reusing already existing fabrication process bricks in an embedded nonvolatile memory (eNVM) sub-40 nm CMOS technology, resulting in a middle-voltage zero-cost transistor, ideal for lowcost products. TCAD simulations are undertaken to confirm the feasibility of the process optimization and predict...
Brevet STMicroelectronics - Université de Provence, n° d'application 11/525529, US 7,675,106
The reliability requirements of Flash memory become more and more challenging. Flash memory technology development needs test chips to allow large statistical studies and a product-like approach. In this paper, we present a methodology of bitmap analysis to extract and follow the intrinsic and extrinsic parameters of a 40nm eFlash technology...