SKOTNICKI , T.

Last name: SKOTNICKI

First name: T.

June 15, 2008 (v1)

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Independent Double Gate - Potential for Non-Volatile Memories

Bossu, G. Puget, S. Masson, P.

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Uploaded on: December 3, 2022
June 15, 2008 (v1)

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On the Potentiality of Planar Independent Double Gate for Capacitorless eDRAM

Puget, S. Bossu, G. Mazoyer, P.

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Uploaded on: December 3, 2022
June 13, 2009 (v1)

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Optimization of Independent Double Gate Floating Body Cell DRAM Performance by Technology Screening

Puget, S. Portal, Jean-Michel Masson, P.

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Uploaded on: October 11, 2023
June 13, 2009 (v1)

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Optimization of Independent Double Gate Floating Body Cell DRAM Performance by Technology Screening

Puget, S. Portal, Jean-Michel Masson, P.

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Uploaded on: December 4, 2022
September 23, 2008 (v1)

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A new embedded NVM thin film cell for low voltage applications

Bossu, G. Demolliens, A. Puget, S.

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Uploaded on: December 3, 2022
September 23, 2008 (v1)

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1TBulk eDRAM Using Gate-Induced Drain-Leakage (GIDL) Current for High Speed and Low Power applications

Puget, S. Bossu, G. Berthollet, F.

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Uploaded on: December 3, 2022
October 2, 2006 (v1)

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Quantum effects influence on thin silicon film capacitor-less DRAM performance

Puget, S. Bossu, G. Regnier, A.

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Uploaded on: December 3, 2022
September 14, 2009 (v1)

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Quantum Effect Modeling in Thin Film Independent Double Gate Capacitorless eDRAM

Puget, S. Bossu, G. Masson, P.

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Uploaded on: December 3, 2022
May 10, 2009 (v1)

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FDSOI Floating Body Cell eDRAM Using Gate-Induced Drain-Leakage (GIDL) Write Current for High Speed and Low Power Applications

Puget, S. Bossu, G. Fenouillet-Beranger, C.

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Uploaded on: December 3, 2022
May 7, 2007 (v1)

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1TBulk eDRAM a reliable concept for nanometre scale high density and low power applications

Puget, S. Bossu, G. Guerin, C.

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Uploaded on: December 3, 2022
2010 (v1)

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Modeling the Independent Double Gate Transistor in Accumulation Regime for 1TDRAM Application

Puget, V. Bossu, G. Masson, P.

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Uploaded on: December 3, 2022
September 12, 2006 (v1)

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A Novel Self Aligned Design Adapted Gate All Around (SADAGAA) MOSFET including two stacked Channels: A High Co-Integration Potential

Wacquez, R. Cerutti, R. Coronel, P.

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Uploaded on: December 4, 2022

SKOTNICKI , T.

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