COMYN , Rémi

The monolithic integration of heterogeneous devices and materials such as III-N compounds with silicon (Si) CMOS technology paves the way for new circuits applications and capabilities for both technologies. However, the heteroepitaxy of such materials on Si can be challenging due to very different lattice parameters and thermal expansion...

International audience

International audience

International audience

Despite a high lateral breakdown voltage above 10 kV for large contact distances and a breakdown field of 5 MV cm −1 for short contact distances, an Al 0.9 Ga 0.1 N/GaN heterostructure with an 8 nm strained GaN channel grown on an AlN/sapphire template suffers from a low and anisotropic mobility. This work deals with a material study to...

GaN and SiC materials and their device technology have matured and become commerciallyavailable. Fundamental material properties will soon limit the performance. Consequently, a novelbreakthrough in power electronics performance requires a new generation of materials. In this frame,the so-called ultra-wide-bandgap (UWBG) materials that have...

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Despite a lower growth temperature is generally considered as a drawback for achieving high crystal quality, the necessity to reduce the nucleation temperature of AlN on Silicon has permitted Molecular Beam Epitaxy (MBE) to demonstrate high performance for GaN transistors operating at high frequency. Compared to Metal-Organic Vapor Phase...

In this paper, we present the fabrication and Direct Current/high voltage characterizations of AlN-based thin and thick channel AlGaN/GaN heterostructures that are regrown by molecular beam epitaxy on AlN/sapphire. A very high lateral breakdown voltage above 10 kV was observed on the thin channel structure for large contact distances. Also, the...

International audience

Herein, the interest of cubic silicon carbide as a template for the growth of AlGaN/ GaN high electron mobility transistor (HEMT) heterostructures on silicon substrates for high-frequency operation is shown. On the one hand, 0.6-0.8 μm-thick 3C-SiC grown by chemical vapor deposition on intrinsic silicon substrate having initial resistivity...

Herein, the interest of cubic silicon carbide as a template for the growth of AlGaN/ GaN high electron mobility transistor (HEMT) heterostructures on silicon substrates for high-frequency operation is shown. On the one hand, 0.6-0.8 μm-thick 3C-SiC grown by chemical vapor deposition on intrinsic silicon substrate having initial resistivity...

This paper reports on the fabrication of an enhancement-mode AlGaN/GaN metal-insulator-semiconductor-high electron mobility transistor with a new barrier epi-layer design based on double Al 0.2 Ga 0.8 N barrier layers separated by a thin GaN layer. Normally-off transistors are achieved with good performances by using digital etching (DE)...

AlN nucleation layers are the basement of GaN-on-Si structures grown for light-emitting diodes, high frequency telecommunication and power switching systems. In this context, our work aims to understand the origin of propagation losses in GaN-on-Si High Electron Mobility Transistors at microwaves frequencies, which are critical for efficient...

We report on the fabrication of an enhancement mode p-GaN/AlN/GaN high electron mobility transistor with selective area sublimation under vacuum of the p-GaN cap layer. The GaN evaporation selectivity is demonstrated on the thin 2 nm AlN barrier layer. Furthermore, the regrowth of AlGaN is a major key to increase the maximum drain current in...

In this paper, we report on the fabrication of a normally-off Al(Ga)N/GaN high electron mobility transistor with selective area sublimation under vacuum of the p type doped GaN cap layer. This soft method makes it possible to avoid damages otherwise induced by post processing with reactive ion etching techniques. The GaN evaporation selectivity...

In the present study, the selective sublimation of the p-GaN cap layer of Al(Ga)N/GaN HEMTs is developed to replace the commonly used dry etching with no risk of damage in the barrier layer in order to fabricate enhanced mode transistors. Thanks to this approach, enhancement-mode transistors are fabricated with a threshold voltage between 0 V...