This paper presents a new low voltage/low power filter design based on Floating-Gate MOS (FGMOS) transistors. FGMOS transistors are used as primitives to design linear and non-linear (/spl radic/x) circuits. This technique enables a voltage reduction in strong inversion mode, and gives a new vision of the translinear principle, suitable for low...
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June 5, 2018 (v1)PublicationUploaded on: March 27, 2023
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June 12, 2018 (v1)Publication
In this paper, a CMOS implementation of a low voltage micropower logarithmic biquad based on floating gate MOS transistors (FGMOS) is presented. The translinear principle applied to the floating gate MOS transistor leads to an easy implementation of the state-space equations without using the source terminal in the loop. The voltage supply can...
Uploaded on: March 27, 2023 -
August 9, 2017 (v1)Publication
A second-order gm-C filter based on the Floating-Gate MOS (FGMOS) technique is presented. It uses a new fully differential transconductor and works at 2 V of voltage supply with a full differential input linear range and a THD below 1%. Programming and tuning are performed by means of a single voltage signal. The transconductor incorporates a...
Uploaded on: December 4, 2022 -
June 5, 2018 (v1)Publication
This paper describes a novel cell used in circuits with Floating Gate MOS transistors (FGMOS) to compensate variations in the device effective threshold voltages caused by the trapped charge at the floating gate. The performance of the circuit is illustrated with experimental results showing a residual error below 1%. This coarse compensation...
Uploaded on: March 27, 2023 -
June 5, 2018 (v1)Publication
In this paper, the design and simulation results of an IV integrator using floating gate MOS (FGMOS) transistor techniques is presented. Combining FGMOS working in strong and in weak inversion a current-mode companding integrator is proposed implemented in a standard CMOS process is able to work with very low supply voltage. It has application...
Uploaded on: December 4, 2022 -
June 22, 2018 (v1)Publication
A new realisation for n-input sorters is presented. Resorting to the neuron-MOS (νMOS) concept and to an adequate electrical scheme, a compact and efficient implementation is obtained.
Uploaded on: December 4, 2022 -
June 13, 2018 (v1)Publication
In this paper, the design of a specific integrated circuit for the measurement of tissue impedances is presented. The circuit will be part of a multi-micro-sensor system intended to be used in cardiac surgery for sensing biomedical parameters in living bodies. Myocardium tissue impedance is one of these parameters which allows ischemia...
Uploaded on: March 27, 2023 -
June 21, 2018 (v1)Publication
The capabilities of the conceptual link between threshold gates and sorting networks are explored by implementing some arithmetic demonstrators. In particular, both an (8×8)-multiplier and a (15,4) counter which use a sorter as the main building block have been implemented. Traditional disadvantages of binary sorters such as their hardware...
Uploaded on: December 4, 2022 -
June 19, 2018 (v1)Publication
This paper presents the rationale for vMOS-based realizations of digital circuits when logic design techniques based on threshold logic gates are used. Some practical problems in the vMOS implementation of threshold gates have been identified and solved. The feasibility and versatility of the proposed technique as well as its potential as a...
Uploaded on: December 5, 2022