BELLIDO DÍAZ , Manuel Jesús

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In the field of logic simulation, the constant advance of technology influences remarkably in the circuits dynamic behavior. Our main aim is to increase precision of logic simulators by taking into account this influence. This task has two main objectives: (a) developing a model for logic gates that unifies the functional behavior and the...

Complex digital systems are typically built on top of several abstraction levels: digital, RTL, computer, operating system and software application. Each abstraction level greatly facilitates the design task at the cost of paying in performance and hardware resources usage. Network time synchronization is a good example of a complex...

Ante el volumen de información a veces contradictoria acerca de la educación, en este artículo pretendemos presentar una propuesta de modelo de formación para ayudar en la medida de lo posible a la creación de programas formativos que tengan en cuenta: la selección cuidadosa de contenidos acordes con las competencias; una estructurada...

A complete VHDL model of bistables including their metastable operation is presented. An RS-NAND latch has been modelled as a basic structure, orienting its implementation towards its inclusion in a cell library. Two applications are included: description of a more complex latch (D-type) and description of a circuit containing three latches...

Nowadays, metastability is becoming a serious problem in high-performance VLSI design, mainly due to the relatively-high probability of error when a bistable circuit operates at high frequencies. As far as we know, there is not any work published that justifies and formally characterizes metastable behavior in dynamic latches. With current...

La realización de sistemas digitales mediante técnicas autotemporizadas constituye la mejor alternativa para resolver la problemática de las técnicas síncro­nas en circuitos VLSI. En esta comunicación se presenta una mejora a la arquitectura autotemporizada presentada en [1,2] y se aplica a la realización de multiplicadores matriciales...

El diseño de biestables con riesgo de metaestabili­dad requiere que posean coeficientes de resolución adecuados. En este trabajo, se introducen dos métodos para su medida y se comparan con otro previamente reportado. Uno de nuestros métodos mejora en dos órdenes de magnitud los tiempos de medida.

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The implementation of digital signal processor circuits via self-timed techniques is currently a valid altemative to solve some problems encountered in synchronous VLSI circuits. However; a main difference between synchronous and asynchronous circuits is the hardware resources needed to implement asynchronous circuits. This communication...

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Los modelos de retraso para puertas lógicas, que usan la mayoría de los simuladores lógicos, carecen de la suficiente precisión. En este trabajo proponemos un nuevo modelo de retraso para las puertas lógicas, que surge directamente del análisis del comportamiento de las mismas. Con este modelo de retraso se obtienen resultados de...

This communication shows the influence of clocking schemes on the digital switching noise generation. It will be shown how the choice of a suited clocking scheme for the digital part reduces the switching noise, thus alleviating the problematic associated to limitations of performances in mixed-signal Analog/Digital Integrated Circuits....

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This communication presents the evidence of a degradation effect causing important reductions in the delay of a CMOS inverter when consecutive input transition are close in time. Complete understanding of the effect is demonstrated, providing a quantifying model. Fully characterization as a function of design variables and external...

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En un mundo complejo y cambiante como el nuestro, a veces resulta difícil comprender en profundidad los avances que vivimos y, en ocasiones, no es fácil discernir lo fundamental de lo accesorio. Debemos admitir que el entorno, la historia, la sociología, la teoría de la evolución y la teoría de sistemas... aplicadas al desarrollo del...

In this article we present a simulator of non-deterministic static P systems using Field Programmable Gate Array (FPGA) technology. Its major feature is a high performance, achieving a constant processing time for each transition. Our approach is based on representing all possible applications as words of some regular context-free language....