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May 21, 2012 (v1)Conference paperUploaded on: December 2, 2022
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October 23, 2012 (v1)Publication
In this paper, an early validation of efficient management strategies of multiple power domains is addressed as a new use case of Transaction-Level virtual prototypes. A generic methodology for adding power features to existing virtual platforms is proposed and a set of requirements to be met when applying it is listed. Added power features...
Uploaded on: December 2, 2022 -
June 9, 2010 (v1)Conference paperNouvelle approche pour l'estimation et le contrôle d'énergie d'un composant au niveau transactionnel
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Uploaded on: December 3, 2022 -
June 9, 2010 (v1)Conference paperNouvelle approche pour l'estimation et le contrôle d'énergie d'un composant au niveau transactionnel
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Uploaded on: October 11, 2023 -
September 26, 2011 (v1)Conference paper
Building efficient and correct system power management strategies relies on efficient power architecture decision-making as well as respecting structural dependencies induced by such architecture. Transaction Level Modeling allows a rapid exploration, verification and evaluation of alternative power management architectures and strategies. This...
Uploaded on: December 3, 2022 -
November 16, 2012 (v1)Journal article
Building efficient and correct system power-management strategies relies on efficient power architecture decisionmaking as well as respecting structural dependencies induced by such architecture. Transaction level modelling allows a rapid exploration, verification and evaluation of alternative power-management architectures and strategies. This...
Uploaded on: December 3, 2022 -
June 13, 2012 (v1)Conference paper
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Uploaded on: December 3, 2022 -
January 5, 2013 (v1)Conference paper
Low power design and verification at the Electronic System Level (ESL) have recently emerged as a challenging research field. This work presents a reliable solution to add such capabilities to Transaction-Level virtual prototypes composed of black-box hardware Intellectual Properties (IPs). This solution relies on a wrapper-based approach in...
Uploaded on: December 3, 2022 -
March 26, 2012 (v1)Conference paper
Defining low power design intent for a system-on-chip (SoC) consists in specifying its power management architecture and strategy according to specific low power techniques such as power gating and multi-voltage scaling requirements. Choosing the most-energy efficient power intent for a final system contributes widely to reduce its overall...
Uploaded on: December 3, 2022 -
May 21, 2012 (v1)Conference paper
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Uploaded on: December 3, 2022 -
September 9, 2009 (v1)Conference paper
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Uploaded on: December 4, 2022