OSTÚA ARANGÜENA , Enrique

This contribution describes the experience of updating a basic digital electronics course in a Computer Science grade as a consequence of the new grades introduced by the European Higher Education Area (EHEA) in a Spanish university. The group under study is special in because it is taught in English under a pilot scheme carried out by the...

Esta contribución presenta una experiencia sobre el proceso de adaptación de una asignatura de electrónica digital básica de primer curso de la titulación de Ingeniería Informática impartida por los autores en uno de sus grupos, con motivo de la implantación de los nuevos títulos de grado. El grupo tiene la particularidad de impartirse en...

En esta comunicación se presenta la realización de una práctica de la asignatura Estructura de Computadores de primer curso de Ingeniería Informática en la que introduce el uso de dispositivos programables. En dicha práctica se realiza un multiplicador secuencial 4x4, diseñándolo con la herramienta ISE WebPack de Xilinx e implementándolo con...

In this contribution, the advantages of using a virtualization platform for IT laboratories is demonstrated. The platform used is based on free (open-source) software and present important advantages with respect to previous virtualization solutions since the new platform provides the students with greater control over their virtual machines....

Se presenta una práctica de introducción al diseño de sistemas digitales sobre FPGAs. El objetivo es que se pueda realizar en los primeros cursos dedicados a sistemas digitales, para que la formación no sea fundamentalmente teórica sino eminentemente práctica aprovechando la enorme versatilidad que ofrecen las FPGAs. Se plantea como un tutorial...

This paper presents the design of a complete RTU (Remote Terminal Unit) with a System-on-Chip solution based completely on both open hardware and software platforms, and developed in conjunction with two industrial companies. The target implementation of the embedded system is a Spartan family FPGA from Xilinx. The article presents the main...

In this work, we present the building of two well-known membrane com- puters (squares generator and divisor test). Although they are very basic machines they present problems common to every P system (competition, parallel execution of rules, membrane dissolution, etc.) that have to be solved in order to get real emulations for them. The...

Se presenta una práctica de introducción al diseño de sistemas digitales sobre FPGAs. El objetivo es que se pueda realizar en los primeros cursos dedicados a sistemas digitales, para que la formación no sea fundamentalmente teórica sino eminentemente práctica aprovechando la enorme versatilidad que ofrecen las FPGAs. Se plantea como un tutorial...

In this paper we present a design of a peripheral for MicroBlaze soft core processor as part of a R+D project carried out in cooperation with three different companies. The objective of the project consisted in the development of an embedded system with a SoC implemented on a FPGA custom-designed board. This work addresses the design of...

Traditional on-chip and off-chip logic analyzers present important shortcomings when used for the longterm verification of industrial embedded systems, forcing the designer to implement ad hoc verification solutions. This paper introduces a suitable solution for long-term verification of FPGA-based designs consisting of a verification core that...

Este trabajo presenta el desarrollo de un sistema de radiocontrol para un coche teledirigido. Se trata de un circuito que, conectado al interfaz serie de un PC, permite controlar el coche desde una aplicación en lenguaje G. Así, el proceso de desarrollo se plantea como una práctica de laboratorio muy interesante y atractiva para los alumnos que...

This paper introduces a low-footprint full hardware boot loading solution for FPGA-based Programmable Systems on Chip. The proposed module allows loading the system code and data from a standard SD card without having to re-program the whole embedded system. The hardware boot loader is processor independent and removes the need of a software...

In this work, we present a computational behavioral model for logic gates called Internode (Internal Node Logic Computational Model) that considers the functionality of the gate as well as all the different internal states the gate can reach. This computational model can be used in logiclevel tools and is valid for any dynamic behavioral...

In this work, we have compared three different methodologies for the implementation of a FFT/IFFT module on FPGA: VHDL coding (VC), System-level tools at RT level (STR), and System-level tools at macroblock level (STM). In terms of resource usage and operation frequency, STM has obtained interesting results, although it has an important...

Traditional on-chip and off-chip logic analyzers present important shortcomings when used for the long-term verification of industrial embedded systems, forcing the designer to implement ad-hoc verification solutions. This contribution presents a suitable solution for long-term verification of FPGAbased designs consisting on a verification core...

Digital designs implemented using SOI processes employ separated bodies for each transistor. This approach is not usually considered in digital bulk-CMOS design because of its obvious area penalty. However, the advantages obtained can justify its utilization in selected parts of the circuits. This is discussed in this paper.

NanoFS is a novel file system for embedded systems and storage-class memories (like flash) and is specially designed to be directly implemented in hardware. NanoFS is based on an original internal layout intended to achieve an optimal hardware implementation of the file system's file lookup and data fetch operations. File system...

Current characterization methods introduce an important error in the measurement process. In this paper, we present a novel method to drive the timing characterization of logic gates under variable input transition times. The method is based on sampling and scaling realistic transition waveforms and it is easy to implement and introduces...

It has been reported that the use of independent body terminals for series transistors in static bulk-CMOS gates improves their timing and dynamic power characteristics. In this paper, the static power consumption of gates using this approach is addressed. When compared to conventional common body static CMOS, important static power...

In this paper the authors evaluate the timing and power performance of three skew-tolerant clocking schemes. These schemes are the well known master–slave clocking scheme (MS) and two schemes developed by the authors: Parallel alternating latches clocking scheme (PALACS) and four-phase parallel alternating latches clocking scheme (four-phase...

This contribution successfully accomplished the design and implementation of an advanced DSP circuit for direct measurements of electrical network parameters (RMS and real and reactive power) with application to network monitoring and quality assurance. The device is implemented on a mid-range Xilinx Spartan-3 family FPGA and includes an OPB...

In this work we present the VHDL implementation of a FFT/IFFT-64 module. This implementation: (a) is relatively quick and (b) occupies a limited amount of area. The module operation is based on a radix-8 butterfly and it allows the calculation of a complex 64-element FFT/IFFT in 290 clock cycles providing a precision of 98.8% on the magnitude...

En este trabajo se propone una práctica de laboratorio para la asignatura Estructura de Computadores de primer curso de Ingeniería Informática consistente en el análisis de una videoconsola. El objetivo básico consiste en analizar el comportamiento de un sistema digital basado en microprocesador de la suficiente simplicidad como para poder...

Esta contribución presenta una aplicación genérica de adquisición de datos y control para sistemas simples que incorpora el registro histórico de la actividad del sistema y la capacidad de consulta y gestión de la aplicación de forma remota vía web. Las características del sistema lo hacen idóneo para su aplicación en el control de granjas o la...

SoC design methodologies show up as a natural and productive method to implement embedded and/or ubiquitous systems. The authors explore the possibilities of the free LEON2 processor core, originally developed by the European Space Agency, and the Xilinx FPGA family to develop a complete SoC design methodology for both hardware and software....