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The test of modulators is cumbersome due to the high performance they reach. Moreover, technology scaling trends raise serious doubts on the intra-die repeatability of devices. Increase of variability will lead to an increase in parametric faults difficult to detect. In this paper, a designoriented testing approach is proposed to perform...

This paper proposes a digital technique to evaluate the integrator leakage within 1st and 2nd order ΣΔ modulators. Integrator leakage is known to be related to the converter precision and belongs to the basic set of design specifications. The technique proposed here involves very few hardware, which makes it specially suitable for Built-In...

This paper presents a simple and fully digital solution to correct the effect of amplifier finite gain in cascade ΣΔ modulators. The main contribution of this letter is a simple digital method to evaluate the integrator pole errors, which are further taken into account to modify the reconstruction filter. The method is applied to a 2-1 cascade...

The cost of Analogue and Mixed-Signal circuit testing is an important bottleneck in the industry, due to timeconsuming verification of specifications that require state-ofthe- art Automatic Test Equipment. In this paper, we apply the concept of Alternate Test to achieve digital testing of converters. By training an ensemble of regression...

This paper proposes a new method for bio-impedance measurement useful to 2D processing of cell cultures. It allows to represent biological samples by using a new impedance sensing method, and exploiting the electrode-to-cell model for both electrical simulation and imaging reconstruction. Preliminary electrical simulations are reported to...

The implementation of a continuous-time filter (CTF) useful for audio frequency applications is presented in this paper. The filter functions can be programmed and tuned with two independent control variables. The filter here proposed has been designed to work at 1.5 V of power supply and at a maximum of 0.5 /spl mu/A/OTA for the worst case...

This paper proposes a method for impedance measurements based on a closed-loop implementation of CMOS circuits. The proposed system has been conceived for alternate current excited systems, performing simultaneously driving and measuring functions, thanks to feedback. The system delivers magnitude and phase signals independently, which can be...

This work presents a new method to estimate the nonlinearity characteristics of analog-to-digital converters (ADCs). The method is based on a nonnecessarily polynomial continuous and differentiable mathematical model of the converter transfer function, and on the spectral processing of the converter output under a sinusoidal input excitation....

This paper presents a new low voltage/low power filter design based on Floating-Gate MOS (FGMOS) transistors. FGMOS transistors are used as primitives to design linear and non-linear (/spl radic/x) circuits. This technique enables a voltage reduction in strong inversion mode, and gives a new vision of the translinear principle, suitable for low...

In this paper, a CMOS implementation of a low voltage micropower logarithmic biquad based on floating gate MOS transistors (FGMOS) is presented. The translinear principle applied to the floating gate MOS transistor leads to an easy implementation of the state-space equations without using the source terminal in the loop. The voltage supply can...

In this paper, an incremental Analog-to- Digital Converter (ADC) designed as part of the signalconditioning circuitry for tissue impedance measurement system is presented. Continuous-time design techniques has been used and a modified implementation of the conversion algorithm, with respect to its discrete-time counterpart, has been developed....

A second-order gm-C filter based on the Floating-Gate MOS (FGMOS) technique is presented. It uses a new fully differential transconductor and works at 2 V of voltage supply with a full differential input linear range and a THD below 1%. Programming and tuning are performed by means of a single voltage signal. The transconductor incorporates a...

The influence of the main source of errors in Switched-Current (SI) filters over the performance of Wave Analog Filters (WAE) is evaluated. Models of mismatching and clock-feedthrough (CF) are deduced for basic building blocks, and applied to study the sensitivity of a third-order filter. Monte Carlo simulations performed using a behavior...

This paper describes a novel cell used in circuits with Floating Gate MOS transistors (FGMOS) to compensate variations in the device effective threshold voltages caused by the trapped charge at the floating gate. The performance of the circuit is illustrated with experimental results showing a residual error below 1%. This coarse compensation...

In this paper, the design and simulation results of an IV integrator using floating gate MOS (FGMOS) transistor techniques is presented. Combining FGMOS working in strong and in weak inversion a current-mode companding integrator is proposed implemented in a standard CMOS process is able to work with very low supply voltage. It has application...

This paper presents a collection of novel current-mode circuit techniques for the integration of very low-voltage (down to 1 V) low-power (few hundreds of μA) complete SoCs in CMOS technologies. The new design proposal is based on both, the Log Companding theory and the MOSFET operating in subthreshold. Several basic building blocks for audio...

This brief presents a low-cost digital technique for background calibration of comparator offsets in pipeline analog-to-digital converters (ADCs). Thanks to calibration, comparator offset errors above half the stage least-significant bit margin in a unitary redundancy scheme are admissible, thus relaxing comparator design requirements and...